Enabling interoperability in high-performance embedded applications

OpenVPX expands on the VPX Base and Dot Specifications and provides a System Specification to address interoperability issues between VPX modules and Chassis. OpenVPX is an extensible specification which addresses the current and future needs for computing in harsh environments.

Risk management for counterfeit materials

Counterfeit materials will continue to challenge the defensive capabilities of manufacturers in the military and aerospace industry.

Overview about the 6U VPX single board computer VPX6-185

This Video is presented by Curtiss-Wright Controls Embedded Computing Curtiss-Wright Controls Embedded Computing’s VPX6-185 6U VPX single board computer is a high performance rugged processing platform.


Early verification and validation using model-based design

One of the primary benefits of model-based design is the opportunity to do rigorous verification and validation in parallel with all other development steps, especially early in the development process.

Smarter products - software becomes the most active ingredient

As software becomes the most active ingredient in product innovation, traditional manufacturers are essentially becoming software companies. While this transformation is sparking unprecedented leaps in product value, it is also introducing new challenges and implications.

Building ultra-slim embedded systems with Em-ITX

Building a slimline or thinline embedded system can be a difficult task or a relatively simple one depending on the form factor chosen for the task. But how slim is slim enough?

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Embedded News & Know-how Newsletter

(Feb 3, 2010)
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CoFluent: graphical specification and validation solution for Questa

CoFluent Design announces that CoFluent Studio allows the creation and automatic generation of SystemC models and test cases for the Mentor Graphics Questa functional verification platform. It allows designers to create executable specifications of an IC by modeling its functionality and use cases using simple graphical notations. Graphics are used to describe blocks, data and control flows. Algorithms are defined with ANSI C code and given an execution time budget. Simulations are driven by use cases for validating the model behavior and time properties. The automatic SystemC transaction-level modeling code generation allows reuse of IC and use case models for validating the register-transfer level implementation in Questa.

The generated SystemC test case can be used as testbench for validating the register-transfer level implementation within the Questa functional verification platform. A SystemVerilog testbench can also be used to validate in parallel the reference SystemC TLM model and its RTL implementation written in VHDL or Verilog within the Questa functional verification platform. The new CoFluent SystemC Library for the Questa functional verification platform is available now in pre-release and will be generally available this quarter as an addition to the upcoming v3.2 release of its CoFluent Studio integrated modeling environment.